Overview Partners Meetings Dissemination

The SoCKET project (SoC toolKit for critical Embedded sysTems) is a French project that gathers industrial and academic partners from the Aerospace Valley and Minalogic pôles to address the issue of design methodologies for critical embedded systems.

The main goals are the following:

  • to define a "seamless" design flow which integrates qualification and certification, from the system level to integrated circuits and to software
  • to apply the SoC's design methodologies to critical embedded systems
  • to reduce design time (by enabling concurrent hardware and software development) and to optimize SoC-based design
  • to disseminate these methodologies through the Aerospace Valley and Minalogic pôles
Duration: June 2008 - December 2011

Goal and technical pillars

  • High level synthesis
  • Heterogeneous simulation techniques (SystemC/TLM)
  • IPs encapsulation and interoperability (IP-XACT/OCP-IP)
  • Semi-formal verification by automatic generation of monitors
  • Mutation analysis techniques
  • Test cases automatic generation
  • Solution based upon market open standards (SystemC/SPIRIT)

More information

Overview poster.

Paper "A Design Flow for Critical Embedded Systems" (V.Lefftz, J.Bertrand, H.Cassé, C.Clienti, P.Coussy, L.Maillet-Contoz, P.Mercier, P.Moreau, L.Pierre, E.Vaumorin), IEEE Symposium on Industrial Embedded Systems, Trento (Italy), July 2010.

Final workshop, IRIT (Toulouse), November 2011.

Contact (coordinator):
Vincent Lefftz
Astrium Satellites - Central Engineering
Data Processing & Advanced Studies / ASG74
Office Z#013
Email: vincent.lefftz@astrium.eads.net